On Oct. 24th., the new ASIC Multi-Compartment Chip(MCC) has been submitted for production at UMC. Based on the BrainScaleS architecture, the MCC is a down sized version of the HICANN enhanced by dendrite routing capabilities, new parameterizations and a dendritic intersection module featuring a resistive element. The MCC circuits will enable multi-compartment emulation the BrainScaleS wafer-scale system.
Measurements are expected to start in the mid of January 2012.
Last update of this page: 2011-10-24 by Sebastian Millner
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