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Past Projects
FACETS (2006–2010) & FACETS-ITN (2009–2013)
Neuromorphic Hardware
Single Chip System
Communication and Control Hardware
The hardware platform serving as a basis for the construction of large scale artificial neural networks has been developed by our group. It has generally been designed for the parallel operation of mixed-signal ANN ASICs. In particular, research has been done based on the Perceptron based HAGEN chip. The hardware platform consists of 16 Nathan network modules interconnected by a high-speed backplane. Each individual Nathan module hosts one ANN ASIC together with the according infrastructure, a programmable logic device (FPGA), and local memory resources. The backplane hosts the modules and allows high-speed digital communication between them. The platform can thus be used to digitally transport neural events between different neural network ASICs which support digital communication.
In order to operate the Nathan modules in parallel, strategies are necessary to coordinate their distributed resources: the neural network model constantly requires input spikes and generates output spikes in a time continuous way. Since the spikes are transferred digitally, they can easily be transported by digital communication technologies, and the spikes generated by a neuron on one ASIC can be fed to the synapses of another one to scale up the size of the neural network. Maintaining the continuous communication between the ASICs requires a carefully designed connectivity.
The necessary high connectivity between the Nathan modules is realized by a high-speed transport network which links the modules via the backplane (see figure on right). This network is capable of transporting data, e.g. neural events, between the Nathan modules with a fixed and guaranteed latency which eventually enables the realization of axonal connections between neurons and synapses on different neural network ASICs as these require this very fixed connection delay. This network delivers digitized events from one chip as synaptic inputs to one (or more) other chips. To transport the neural events with a fixed axonal delay, it is important to ensure that the underlying transport network can deliver the data for every connection with a guaranteed latency.
Furthermore, the transport network provides the exchange of large amounts of data between the Nathan modules to a high-level controlling software and the programmable logic. For this purpose the same transport network is used to create a large shared memory which allows the remote access to memory resources on any Nathan module by means of a global shared memory address space.
