The analog receiver circuit

The current signals delivered on AnalogOut and AnalogOutDummy should be received by a fast (bandwidth 100 MHz) transimpedance amplifier to make use of the full 40 MHz drive capability of the onchip current buffer and subtracted from each other to reduce common mode interference. The schematic depicted in fig. 10 shows the suggested receiver circuit. The gain delivered at 1.5k$\Omega$ transimpedance is $\approx$ 85mV/MIP$_{\rm Si}$ (Helix128S-2/2.1) resp. 425mV/MIP$_{\rm Si}$ (Helix128S-2.2/2.3). The 50 $\Omega$ resistors at the inputs were chosen to terminate properly a 50 $\Omega$ cable. The Comlinear CLC 401 opamp features a high bandwidth and the ability to handle large voltage gains (voltage gain = 30 in the suggested configuration).

  

Figure 10: Suggested receiver circuit for the analog signals AnalogOut and AnalogOutDummy of the Helix128-2.0. For the Helix versions 2.2 and 2.3, $300\Omega$ should be used as feedback resistor together with a Comlinear CLC400 instead of the CL401.