Failsafe daisy chaining with Helix128-3.0

With Helix128-2 daisy chaining, a single chip failure would cause the complete daisy chain of chips unaccessible. This is especially disastrous when the daisy chain is very long. To decrease the impact of a single chip failure on the whole daisy chain a failsafe daisy chain mechanism has been implemented in the Helix128-3.0, which ensures that no isolated defect chip in a daisy chain can block the complete chain.

  

Figure 15: Failsafe daisy chain mechanism. The arrows indicate where tokens are submitted. The thick lines indicate the active token path which is routed around the broken chip in the chain.

Every chip is not only connected to its predecessor and successor in the daisy chain, but also to the second predecessor and successor (fig. 15). When a chip has sent its data it sends a token via the HelixTokenOut and FailsafeHelixTokenOut ports .

These tokens are routed to the chip's successor's HelixTokenIn port and to the second successor's FailsafeHelixTokenIn port. Normally, a chip starts transmission of data when the token arrives at the HelixTokenIn port. The successor of a broken chip can be programmed to start transmission of data upon reception of a token on its FailsafeTokenIn port.

The same mechanism is implemented for the ReturnToken ports.

The failsafe token mechanism is programmable via the bit 4 ...7 of the clock divider register. Table 4.6.2 shows all bits necessary for controlling the mechanism.

Bitname Explanation Number

If 0 then HelixTokenIn is activated, if 1 then FailsafeHelixTokenIn is activated 4

If 0 then ReturnTokenIn is activated, if 1 then FailsafereturnTokenIn is activated 5

If this chip is the last in the chain, this bit must be set to 1 6

If this chip is the first in the chain, this bit must be set to 1 7

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[Definition of failsafe token control bits] Definition of failsafe token control bits and bit number in the ClkDiv register