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The content of the TokenDelay register determines the duration
in
RClk cycles the leading Helix128-2 waits before it starts sending the
next
event's analog data after having received the return token from the
previous readout.
Thus, a regular delay in processing of the sent data can be accounted
for
(see fig. 14).
The delay is achieved by holding back the SufixTokenOut
token output of the leading Helix128-2.
A value of 0 indicates immediate sending of the next event.
In case of single chip operation the delay as specified in the
TokenDelay register is added to the time which is needed
to load the multiplexer.
Martin Feuerstack
2/3/1999