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The frontend (Helix2.1)

Helix128-2 uses the Helix2.1 frontend (fig. 2) which has been carefully optimized with respect to noise, pulse shape (peak time and undershoot), linearity, space and power consumption. More detailed descriptions can be found in [2] and [3].


  
Figure 2: Helix2.1 frontend
\begin{figure}
\centerline{
\epsfig {file=Helix21Frontend.eps,width=12cm}
}\end{figure}

To set the frontend operation mode and to compensate for radiation damage the frontend bias voltages and currents (not to be confused with the power supplies +2V,0V,-2V) may be adjusted via programming of the corresponding DAC registers as explained in section 4. The nominal values are listed in table 1.


 
Table 1: Nominal values of analog bias voltages and currents and suggested radiation compensation strategies; $\Rightarrow$ indicates no change, $\Downarrow$/$\Uparrow$ suggests negative/positive adjusting of the corresponding bias. Since the LSB of the 8bit wide voltage value registers is ignored the corresponding values must be multiplied by 2.
Name 2|c|Nominal value = Irradiation  
  2|c|and dec. reg. cont. = compensation  
Ipre $200\mu\/$A = 80 $\Rightarrow\Uparrow$
Isha $100\mu\/$A = 40 $\Rightarrow$
Ibuf $100\mu\/$A = 40 $\Rightarrow\Uparrow$
Icomp $50\mu\/$A = 20 $\Rightarrow\Uparrow$
Ipipe (Helix128-2.0$\ldots$2.1) 50..$100\mu\/$A = 20..40 $\Rightarrow$
Ipipe (Helix128-2.2) 40$\mu$A = 16 $\Rightarrow$
Ipipe (Helix128-2.3) $20\mu\/$A = 8 $\Rightarrow$
Isf $100\mu\/$A = 40 $\Rightarrow\Uparrow$
Idriver $90\mu\/$A = 36 $\Rightarrow$
Vfp 0.2V = 71 $\Downarrow$
Vfs 1.5V = 113 $\Downarrow$
VcompRef $\pm$20mV = 71 $\Rightarrow$
Vdcl (Helix128-2.0$\ldots$2.2) 1V = 97 $\Rightarrow$
Vdcl (Helix128-2.3) -1.1V = 97 $\Rightarrow$
Vd (Helix128-2.0,2.1) V = 65 $\Downarrow$
Vd (Helix128-2.2,2.3) -840mV = 65 $\Downarrow$
Voffset -0.5V = 55 $\Rightarrow\Uparrow$
 


next up previous contents
Next: The comparator Up: Analog Signal Processing Architecture Previous: Overview

Martin Feuerstack
2/3/1999