Beetle - a readout chip for LHCb
 |
 |
Content
- What is Beetle?
- News on the Beetle
- Contacts
- Talks and presentations
- Beetle meetings and reviews
- Submissions
- Beetle
- Beetle 1.5
- Beetle 1.4
- Beetle 1.3
- Beetle 1.2 MA0
- Beetle 1.2
- PCB
- Motherboard
- Measurements
- Beetle 1.1
- Beetle 1.0
- BeetleFE
- BeetleBG
- BeetlePA
- BeetleCO
- BeetleMA
- BeetleSR
- Publications and Documentation
- Gallery
- Links
Measurements with Beetle 1.2
01.08.2002 Beetle 1.2 is alive!
Up to now the following was tested:- power-up reset works
- I2C-Interface works fine
- chip accepts triggers and starts readout
- 16 consec. triggers are consumed before FifoFull gets active
- DataValid has right lenght (875 ns) and spacing of 1 cycle between consecutive readout bursts.
- data header is correctly encoded: contains 8 info bits + 8-bit
- pipeline column number
- chip provides latency of 160 cycles
The screenshot shows a readout burst: 1 MIP signals are coupled into 11 different channels and read out via a single port
Letzte Änderung: 1 Aug 2002