Synopsys

For synthesis we need a greater design. I prefer the following design, which you can download here. I don't want explain the function of this circuit, but sometimes it is better to understand the function of the circuit. Anyway. In this archive you will find five files: alarm_fsm.v bcd_dec_low.v time_block2.v wecker.v weckertop.v. Weckertop.v is the testbed module, with this module you can simulate the design. The rest four modules must we use for synthesis. But before we must modify our .bashrc

     if [ -f /usr/local/cad/scripts/synorc ] ; then
     . /usr/local/cad/scripts/synorc
     fi

After this you must copy the synopsis setup file in your working diretory:

cp $AMS_DIR/synopsys/-process-/.synopsys_dc.setup .

for -process- you must enter your selected process e.g. cub_3.3V. With cat alarm_fsm.v bcd_dec_low.v time_block2.v wecker.v > wecker_all.v we create a single file with all modules we need.