ASIC laboratory Heidelberg

Content

Tutorials
Cadence
Verilog Example
Verilog XL
Synopsys
Silicon Ensemble

Set Up
Starting GUI
Setting Variables
Import Verilog
Import Power Definition
Floorplan
Place IO
Place Power&Cell
Connect Ring
Route
Batch mode

Dracula, Calibre, ...

Place power rings, power stripes and cells

The next step are the power rings and power stripes. Route -> Plan Power.. opens the PP window.In the Add Rings... popup you have to change the nets. Set Core Ring Width to 10.00 for metal1 and metal2 and set Block Ring Width to 5.00 for metal1 and metal2.

Place Power Rings

In Add Stripes... you must set width to 5.00 and spacing to 2.00 for metal2. Click Stripe Offset From and set Left to 165.00. Finally set Set to Set Spacing to 330.00. All lenghts are in micron.

Place Power Stripes

To place the cells we need Place -> Cells.... The defaults value are ok.
After cell placing you can execute the fillperi.mac file with File -> Execute....

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Last change: 8 Jun 2001