ASIC laboratory Heidelberg

Content

Tutorials
Cadence
Verilog Example
Verilog XL
Synopsys
Silicon Ensemble

Set Up
Starting GUI
Setting Variables
Import Verilog
Import Power Definition
Floorplan
Place IO
Place Power&Cell
Connect Ring
Route
Batch mode

Dracula, Calibre, ...

Setting the variables

With Edit -> Environment we can add or vary some variables. Insert in the find field INPUT.VERILOG.GROUND.NET and press Find. Now we can change the value that it agree with our power_corner.def file. This means we have to delete the unwanted PVSSR3!. Do this methode also on the INPUT.VERILOG.POWER.NET and INPUT.VERILOG.SPECIAL.NETS variable. Additional change INPUT.VERILOG.LOGIC.0.NET and INPUT.VERILOG.LOGIC.1.NET the values to lowercase.

Environment Variables

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Last change: 8 Jun 2001